Master Thesis - two-Stage Operational Amplifier Analog Generator in 28 nm Tsmc Technology
Silicon Austria Labs GmbH - - Linz, Villach, Graz
RF Systems
Linz/Villach/Graz
In this master thesis a new design methodology will be used to design a two-stage operational amplifier (OpAmp) analog generator in 28nm TSMC technology. The candidate will familiarize himself/herself with the design framework based on Berkeley Analog Generator (BAG) with Python as a scripting tool and Cadence as a generator execution tool (co-supervised). She/he will also analyze available cores of two-stage operation amplifier analog generators (self-learning) and available CMFB analog generators. Candidate will adapt available script based on discussion with researchers/supervisor towards successful analog generator (co-supervised).
Your future responsibilities
* Literature (re)search regarding two-stage operational amplifier design.
* Coded two-stage operational amplifier design methodology generator within BAG framework.
* Publication of the results at a conference or in a scientific journal
Your profile
* Experience in Cadence analog design flow (from schematic to post-layout simulation).
* Knowledge of analog IC design methodology (operation amplifier, current mirror, current source, etc.).
* Python knowledge.
* Linux knowledge is a plus.
* Team player, self motivated and goal oriented.
Important Facts
The starting date of this position is flexible.
This position is endowed with a gross monthly salary of EUR 1000,-/ for 15/h a week based on the collective agreement for research (Forschungs-Kollektivvertrag").
The weekly hours are flexible and we are happy to discuss further options.
The contract is valid for 7 months.
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